1. Field
Embodiments described herein relate generally to a nonvolatile semiconductor memory device.
2. Description of the Related Art
In recent years, along with a rising level of integration in semiconductor devices, circuit patterns of transistors and the like which configure the semiconductor devices are being increasingly miniaturized. Required in this miniaturization of the patterns is not simply a thinning of line width but also an improvement in dimensional accuracy and positional accuracy of the patterns. This trend applies also to semiconductor memory devices.
Conventionally known and marketed semiconductor memory devices such as DRAM, SRAM, and flash memory each use a MOSFET as a memory cell. Consequently, there is required, accompanying the miniaturization of patterns, an improvement in dimensional accuracy at a rate exceeding a rate of the miniaturization. As a result, a large burden is placed also on the lithography technology for forming these patterns which is a factor contributing to a rise in product cost.
In recent years, resistance varying memories are attracting attention as a candidate to succeed these kinds of semiconductor memory devices utilizing a MOSFET as a memory cell (see, for example, patent document 1: JP 2005-522045 W). Resistance varying memories include: a resistance varying memory in the narrowly-defined meaning (ReRAM: Resistive RAM), which stores, in a nonvolatile manner, a resistance state of its recording layer made of a transition metal oxide; and a phase change memory (PCRAM: Phase Change RAM) which uses chalcogenide, etc. as its recording layer and utilizes the resistance information of the chalcogenide in its crystalline state (conductive) and its amorphous state (insulative).
It is known that the resistance varying memories use two types of variable resistance elements. One is called bipolar type which is set to a high resistance state and a low resistance state by switching the polarities of the voltages to apply. The other is called unipolar type which can be set to a high resistance state and a low resistance state not by switching the polarities of the voltages to apply, but by controlling the voltage values.
The unipolar type is preferred in order to realize a high-density memory cell array, because when the unipolar type is used, it is possible to configure a cell array not by using a transistor but by stacking a variable resistance element and a rectifying element such as a diode, etc. at the intersections of bit lines and word lines. Furthermore, if such memory cell arrays are stacked three-dimensionally, transistors become unnecessary, which makes it possible to realize a large memory capacity without increasing the cell array area.
In a unipolar type ReRAM, write of data into a memory cell is executed by applying a certain voltage to the variable resistance element for a certain time. As a result, the variable resistance element changes from a high resistance state to a low resistance state. Hereinafter, this operation of changing the variable resistance element from a high resistance state to a low resistance state will be referred to as set operation.
On the other hand, erase of data from a memory cell is executed by applying a certain voltage lower than the voltage in the set operation for a certain time to the variable resistance element having undergone the set operation and hence currently existing in a low resistance state. As a result, the variable resistance element changes from a low resistance state to a high resistance state. Hereinafter, this operation of changing the variable resistance element from a low resistance state to a high resistance state will be referred to as reset operation. A memory cell is defined as being in a stable state (a reset state) when, for example, it is in a high resistance state. When a memory cell is configured to store binary data, data is written into the memory cell by a set operation of changing the memory cell from the stable reset state to a low resistance state.
When setting or resetting a given cell, after a certain voltage is applied to the cell for a certain time, the cell is read by such a low voltage as would not change the resistance state of the memory cell, in order to confirm whether the cell is set or reset normally. When it is determined in this reading operation that the cell is not set or reset normally, a pulse having a voltage higher than that of the previous pulse by a certain value is applied to the cell for a certain time, and then a similar confirmation operation is executed. The above operations are repeated and voltage pulses are applied to the memory cell until the memory cell is set or reset normally.
The inventors herein have also promoted development of unipolar type ReRAM, and assessed pulse-driven set or reset operations by using a cell array of a practical level. As a result, it has been turned out that particularly in reset operations, so-called erroneous writing, which causes the reset target selected memory cell to be set again after it is reset, occurs at a high rate.